schema_version: "1.1"
design_loop_card:
  card_id: example-array-study-level-0
  conformance_level: 0
  intent:
    objective: Determine whether a 32x8 accelerator array merits a bounded RTL experiment.
    constraints:
    - Hold SRAM capacity, workload, and dataflow constant.
    non_goals:
    - Authorize tapeout or integration, or claim post-layout performance or energy.
    risks:
    - The illustrative estimator omits memory, timing, and routing effects.
    claim_boundary:
      claim: The card scopes the 16x16/32x8 comparison and the decision whether to run one bounded RTL experiment for the 32x8 array.
      non_claim: The 32x8 array improves post-layout performance or energy.
  task: dse
  design_space:
    legal:
    - 16x16 and 32x8 arrays.
    invalid:
    - Shapes that exceed 256 processing elements.
    deferred:
    - SRAM banking, clock frequency, and physical design.